diff -Naur gperftools-2.9.1.org/config.guess gperftools-2.9.1.sw/config.guess
--- gperftools-2.9.1.org/config.guess	2022-03-10 02:22:50.072357080 +0000
+++ gperftools-2.9.1.sw/config.guess	2022-03-10 01:51:43.000000000 +0000
@@ -275,6 +275,36 @@
     mips:OSF1:*.*)
         echo mips-dec-osf1
         exit ;;
+    sw_64:OSF1:*:*)
+        case $UNAME_RELEASE in
+        *4.0)
+                UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'`
+                ;;
+        *5.*)
+                UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'`
+                ;;
+        esac
+        # According to Compaq, /usr/sbin/psrinfo has been available on
+        # OSF/1 and Tru64 systems produced since 1995.  I hope that
+        # covers most systems running today.  This code pipes the CPU
+        # types through head -n 1, so we only detect the type of CPU 0.
+        SW_64_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^  The sw_64 \(.*\) processor.*$/\1/p' | head -n 1`
+        case "$SW_64_CPU_TYPE" in
+            "SW6A (1621)")
+                UNAME_MACHINE=sw_64sw6a ;;
+            "SW6B (3231)")
+                UNAME_MACHINE=sw_64sw6b ;;
+        esac
+        # A Pn.n version is a patched version.
+        # A Vn.n version is a released version.
+        # A Tn.n version is a released field test version.
+        # A Xn.n version is an unreleased experimental baselevel.
+        # 1.2 uses "1.2" for uname -r.
+        echo "$UNAME_MACHINE"-dec-osf"`echo "$UNAME_RELEASE" | sed -e 's/^[PVTX]//' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz`"
+        # Reset EXIT trap before exiting to avoid spurious non-zero exit code.
+        exitcode=$?
+        trap '' 0
+        exit $exitcode ;;
     alpha:OSF1:*:*)
 	case $UNAME_RELEASE in
 	*4.0)
@@ -904,6 +934,15 @@
 	UNAME_MACHINE=aarch64_be
 	echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"
 	exit ;;
+    sw_64:Linux:*:*)
+        case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in
+          SW6A)  UNAME_MACHINE=sw_64sw6a ;;
+          SW6B)  UNAME_MACHINE=sw_64sw6b ;;
+        esac
+        objdump --private-headers /bin/sh | grep -q ld.so.1
+        if test "$?" = 0 ; then LIBC=gnulibc1 ; fi
+        echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"
+        exit ;;
     alpha:Linux:*:*)
 	case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in
 	  EV5)   UNAME_MACHINE=alphaev5 ;;
@@ -1397,6 +1436,7 @@
 	UNAME_MACHINE=`(uname -p) 2>/dev/null`
 	case "$UNAME_MACHINE" in
 	    A*) echo alpha-dec-vms ; exit ;;
+            S*) echo sw_64-dec-vms ; exit ;;
 	    I*) echo ia64-dec-vms ; exit ;;
 	    V*) echo vax-dec-vms ; exit ;;
 	esac ;;
diff -Naur gperftools-2.9.1.org/config.sub gperftools-2.9.1.sw/config.sub
--- gperftools-2.9.1.org/config.sub	2022-03-10 02:22:50.072357080 +0000
+++ gperftools-2.9.1.sw/config.sub	2022-03-10 01:51:43.000000000 +0000
@@ -247,6 +247,7 @@
 	| aarch64 | aarch64_be \
 	| alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \
 	| alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \
+	| sw_64 | sw_64sw6a | sw_64sw6b \
 	| am33_2.0 \
 	| arc | arceb \
 	| arm | arm[bl]e | arme[lb] | armv[2-8] | armv[3-8][lb] | armv7[arm] \
@@ -372,6 +373,7 @@
 	| alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \
 	| alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \
 	| alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \
+	| sw_64-* | sw_64sw6a-* | sw_64sw6b-* \
 	| arm-*  | armbe-* | armle-* | armeb-* | armv*-* \
 	| avr-* | avr32-* \
 	| ba-* \
diff -Naur gperftools-2.9.1.org/configure gperftools-2.9.1.sw/configure
--- gperftools-2.9.1.org/configure	2022-03-10 02:22:50.062357080 +0000
+++ gperftools-2.9.1.sw/configure	2022-03-10 01:51:43.000000000 +0000
@@ -18218,6 +18218,7 @@
    pc_fields="$pc_fields uc_mcontext.gregs[REG_RIP]" # Linux (x86_64)
    pc_fields="$pc_fields uc_mcontext.sc_ip"            # Linux (ia64)
    pc_fields="$pc_fields uc_mcontext.pc"               # Linux (mips)
+   pc_fields="$pc_fields uc_mcontext.sc_pc"               # Linux (sw_64)
    pc_fields="$pc_fields uc_mcontext.uc_regs->gregs[PT_NIP]" # Linux (ppc)
    pc_fields="$pc_fields uc_mcontext.__gregs[REG_PC]"  # Linux (riscv64)
    pc_fields="$pc_fields uc_mcontext.psw.addr"         # Linux (s390)
diff -Naur gperftools-2.9.1.org/src/base/basictypes.h gperftools-2.9.1.sw/src/base/basictypes.h
--- gperftools-2.9.1.org/src/base/basictypes.h	2022-03-10 02:22:50.092357080 +0000
+++ gperftools-2.9.1.sw/src/base/basictypes.h	2022-03-10 01:51:43.000000000 +0000
@@ -378,6 +378,8 @@
     // some ARMs have shorter cache lines (ARM1176JZF-S is 32 bytes for example) but obviously 64-byte aligned implies 32-byte aligned
 # elif (defined(__mips__))
 #   define CACHELINE_ALIGNED __attribute__((aligned(128)))
+# elif (defined(__sw_64__))
+#   define CACHELINE_ALIGNED __attribute__((aligned(128)))
 # elif (defined(__aarch64__))
 #   define CACHELINE_ALIGNED __attribute__((aligned(64)))
     // implementation specific, Cortex-A53 and 57 should have 64 bytes
diff -Naur gperftools-2.9.1.org/src/malloc_hook_mmap_linux.h gperftools-2.9.1.sw/src/malloc_hook_mmap_linux.h
--- gperftools-2.9.1.org/src/malloc_hook_mmap_linux.h	2022-03-10 02:22:50.122357080 +0000
+++ gperftools-2.9.1.sw/src/malloc_hook_mmap_linux.h	2022-03-10 01:51:43.000000000 +0000
@@ -56,7 +56,7 @@
     || defined(__aarch64__) \
     || (defined(_MIPS_SIM) && (_MIPS_SIM == _ABI64 || _MIPS_SIM == _ABIN32)) \
     || defined(__s390__) || (defined(__riscv) && __riscv_xlen == 64) \
-    || defined(__e2k__)
+    || defined(__e2k__) || defined(__sw_64__)
 
 static inline void* do_mmap64(void *start, size_t length,
                               int prot, int flags,
