27 lines
845 B
Diff
27 lines
845 B
Diff
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diff -Naur leveldb-1.20.org/port/atomic_pointer.h leveldb-1.20.sw/port/atomic_pointer.h
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--- leveldb-1.20.org/port/atomic_pointer.h 2022-08-18 15:03:54.160000000 +0000
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+++ leveldb-1.20.sw/port/atomic_pointer.h 2022-08-18 15:06:03.380000000 +0000
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@@ -37,6 +37,8 @@
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#define ARCH_CPU_ARM_FAMILY 1
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#elif defined(__aarch64__)
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#define ARCH_CPU_ARM64_FAMILY 1
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+#elif defined(__sw_64__)
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+#define ARCH_CPU_SW_64_FAMILY 1
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#elif defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__)
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#define ARCH_CPU_PPC_FAMILY 1
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#elif defined(__mips__)
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@@ -96,6 +98,13 @@
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}
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#define LEVELDB_HAVE_MEMORY_BARRIER
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+// SW_64
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+#elif defined(ARCH_CPU_SW_64_FAMILY)
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+inline void MemoryBarrier() {
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+ asm volatile("memb" : : : "memory");
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+}
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+#define LEVELDB_HAVE_MEMORY_BARRIER
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+
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// ARM64
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#elif defined(ARCH_CPU_ARM64_FAMILY)
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inline void MemoryBarrier() {
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