diff -Naur lshw-B.02.19.2.org/README.md lshw-B.02.19.2.sw/README.md
--- lshw-B.02.19.2.org/README.md	2022-03-02 05:57:54.280000000 +0000
+++ lshw-B.02.19.2.sw/README.md	2022-03-02 06:01:57.610000000 +0000
@@ -14,7 +14,7 @@
 
  1. Requirements
    - Linux 2.4.x, 2.6.x, 3.x or 4.x (2.2.x might work, though)
-   - a PA-RISC-, Alpha-, IA-64- (Itanium-), PowerPC-, ARM- or x86- based machine
+   - a PA-RISC-, Alpha-, Sw_64-,  IA-64- (Itanium-), PowerPC-, ARM- or x86- based machine
    - cmake, GNU make or Ninja
    - an ANSI (or close enough to ANSI compliance) C++ compiler (tested with g++ 2.95.4 and 3.x)
    - for the (optional) GTK+ graphical user interface, you will need a
diff -Naur lshw-B.02.19.2.org/src/core/cpuid.cc lshw-B.02.19.2.sw/src/core/cpuid.cc
--- lshw-B.02.19.2.org/src/core/cpuid.cc	2022-03-02 05:57:54.280000000 +0000
+++ lshw-B.02.19.2.sw/src/core/cpuid.cc	2022-03-02 06:17:08.250000000 +0000
@@ -10,7 +10,7 @@
 
 __ID("@(#) $Id$");
 
-#if defined(__i386__) || defined(__alpha__)
+#if defined(__i386__) || defined(__alpha__) || defined(__sw_64__)
 
 static hwNode *getcache(hwNode & node,
 int n = 0)
@@ -70,7 +70,7 @@
   else
     return NULL;
 }
-#endif                                            // __i386__ || __alpha__
+#endif                                            // __i386__ || __alpha__ || __sw_64__
 
 #ifdef __i386__

diff -Naur lshw-B.02.19.2.org/src/core/cpuinfo.cc lshw-B.02.19.2.sw/src/core/cpuinfo.cc
--- lshw-B.02.19.2.org/src/core/cpuinfo.cc	2022-03-02 05:57:54.280000000 +0000
+++ lshw-B.02.19.2.sw/src/core/cpuinfo.cc	2022-03-02 06:09:36.460000000 +0000
@@ -360,6 +360,63 @@
   }
 }
 
+static void cpuinfo_sw_64(hwNode & node,
+string id,
+string value)
+{
+  static int cpusdetected = 0;
+  static int cpusactive = 0;
+  unsigned long long frequency = 0;
+  int i;
+
+  hwNode *cpu = getcpu(node, 0);
+
+  if (id == "platform string" && node.getProduct() == "")
+    node.setProduct(value);
+  if (id == "system serial number" && node.getSerial() == "")
+    node.setSerial(value);
+  if (id == "system type")
+    node.setVersion(node.getVersion() + " " + value);
+  if (id == "system variation")
+    node.setVersion(node.getVersion() + " " + value);
+  if (id == "system revision")
+    node.setVersion(node.getVersion() + " " + value);
+
+  if (id == "cpus detected")
+    cpusdetected = atoi(value.c_str());
+  if (id == "cpus active")
+    cpusactive = atoi(value.c_str());
+  if (id == "cycle frequency [Hz]")
+    frequency = atoll(value.c_str());
+
+  if (cpu)
+  {
+    cpu->claim(true);
+
+    if (frequency)
+      cpu->setSize(frequency);
+  }
+
+  for (i = 1; i < cpusdetected; i++)
+  {
+    hwNode *mycpu = getcpu(node, i);
+
+    if (mycpu)
+    {
+      mycpu->disable();
+
+      if (cpu)
+        mycpu->setSize(cpu->getSize());
+    }
+  }
+  for (i = 1; i < cpusactive; i++)
+  {
+    hwNode *mycpu = getcpu(node, i);
+
+    if (mycpu)
+      mycpu->enable();
+  }
+}
 static void cpuinfo_alpha(hwNode & node,
 string id,
 string value)
@@ -637,6 +694,10 @@
         {
           cpuinfo_alpha(n, id, value);
         }
+        else if (plat == "sw_64")
+        {
+          cpuinfo_sw_64(n, id, value);
+        }
         else if (plat == "ia64")
         {
           cpuinfo_ia64(n, id, value);
diff -Naur lshw-B.02.19.2.org/src/core/dmi.cc lshw-B.02.19.2.sw/src/core/dmi.cc
--- lshw-B.02.19.2.org/src/core/dmi.cc	2022-03-02 05:57:54.280000000 +0000
+++ lshw-B.02.19.2.sw/src/core/dmi.cc	2022-03-02 06:11:38.140000000 +0000
@@ -734,7 +734,8 @@
     "Core M3",
     "Core M5",
     "Core M7",
-    "Alpha",                                      /* 0x30 */
+    "Sw_64",                                      /* 0x9916 */
+    "Alpha",                                      /* 0x30 */
     "Alpha 21064",
     "Alpha 21066",
     "Alpha 21164",
diff -Naur lshw-B.02.19.2.org/src/core/pci.cc lshw-B.02.19.2.sw/src/core/pci.cc
--- lshw-B.02.19.2.org/src/core/pci.cc	2022-03-02 05:57:54.290000000 +0000
+++ lshw-B.02.19.2.sw/src/core/pci.cc	2022-03-02 06:13:58.590000000 +0000
@@ -169,6 +169,7 @@
 #define PCI_CLASS_PROCESSOR_486      0x0b01
 #define PCI_CLASS_PROCESSOR_PENTIUM  0x0b02
 #define PCI_CLASS_PROCESSOR_ALPHA    0x0b10
+#define PCI_CLASS_PROCESSOR_SW_64    0x9916
 #define PCI_CLASS_PROCESSOR_POWERPC  0x0b20
 #define PCI_CLASS_PROCESSOR_CO       0x0b40
 
