100 lines
4.4 KiB
Diff
100 lines
4.4 KiB
Diff
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From 9ce9ecae9d7cf59554908787386901dd82fd7395 Mon Sep 17 00:00:00 2001
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From: guping <guping_yewu@cmss.chinamobile.com>
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Date: Wed, 9 Oct 2024 09:21:03 +0800
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Subject: [PATCH] intel_iommu: Fix invalidation descriptor type field
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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cherry-pick from 663168943d3db6d9b51d3dfa0998848a6e6eda71
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According to spec, invalidation descriptor type is 7bits which is
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concatenation of bits[11:9] and bits[3:0] of invalidation descriptor.
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Currently we only pick bits[3:0] as the invalidation type and treat
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bits[11:9] as reserved zero. This is not a problem for now as bits[11:9]
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is zero for all current invalidation types. But it will break if newer
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type occupies bits[11:9].
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Fix it by taking bits[11:9] into type and make reserved bits check accurate.
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Suggested-by: default avatarClément <Mathieu--Drif<clement.mathieu--drif@eviden.com>
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Signed-off-by: default avatarZhenzhong Duan <zhenzhong.duan@intel.com>
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Reviewed-by: default avatarYi Liu <yi.l.liu@intel.com>
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Reviewed-by: default avatarClément <Mathieu--Drif<clement.mathieu--drif@eviden.com>
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Message-Id: <20240814071321.2621384-2-zhenzhong.duan@intel.com>
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Reviewed-by: MST's avatarMichael S. Tsirkin <mst@redhat.com>
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Signed-off-by: MST's avatarMichael S. Tsirkin <mst@redhat.com>
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Signed-off-by: guping <guping_yewu@cmss.chinamobile.com>
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---
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hw/i386/intel_iommu.c | 2 +-
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hw/i386/intel_iommu_internal.h | 11 ++++++-----
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2 files changed, 7 insertions(+), 6 deletions(-)
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diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
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index 2d5ad84149..2f8bcc1557 100644
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--- a/hw/i386/intel_iommu.c
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+++ b/hw/i386/intel_iommu.c
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@@ -2502,7 +2502,7 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s)
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return false;
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}
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- desc_type = inv_desc.lo & VTD_INV_DESC_TYPE;
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+ desc_type = VTD_INV_DESC_TYPE(inv_desc.lo);
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/* FIXME: should update at first or at last? */
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s->iq_last_desc_type = desc_type;
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diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
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index a6c788049b..2b2f0dd848 100644
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--- a/hw/i386/intel_iommu_internal.h
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+++ b/hw/i386/intel_iommu_internal.h
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@@ -340,7 +340,8 @@ union VTDInvDesc {
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typedef union VTDInvDesc VTDInvDesc;
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/* Masks for struct VTDInvDesc */
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-#define VTD_INV_DESC_TYPE 0xf
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+#define VTD_INV_DESC_TYPE(val) ((((val) >> 5) & 0x70ULL) | \
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+ ((val) & 0xfULL))
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#define VTD_INV_DESC_CC 0x1 /* Context-cache Invalidate Desc */
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#define VTD_INV_DESC_IOTLB 0x2
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#define VTD_INV_DESC_DEVICE 0x3
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@@ -356,7 +357,7 @@ typedef union VTDInvDesc VTDInvDesc;
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#define VTD_INV_DESC_WAIT_IF (1ULL << 4)
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#define VTD_INV_DESC_WAIT_FN (1ULL << 6)
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#define VTD_INV_DESC_WAIT_DATA_SHIFT 32
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-#define VTD_INV_DESC_WAIT_RSVD_LO 0Xffffff80ULL
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+#define VTD_INV_DESC_WAIT_RSVD_LO 0Xfffff180ULL
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#define VTD_INV_DESC_WAIT_RSVD_HI 3ULL
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/* Masks for Context-cache Invalidation Descriptor */
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@@ -367,7 +368,7 @@ typedef union VTDInvDesc VTDInvDesc;
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#define VTD_INV_DESC_CC_DID(val) (((val) >> 16) & VTD_DOMAIN_ID_MASK)
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#define VTD_INV_DESC_CC_SID(val) (((val) >> 32) & 0xffffUL)
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#define VTD_INV_DESC_CC_FM(val) (((val) >> 48) & 3UL)
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-#define VTD_INV_DESC_CC_RSVD 0xfffc00000000ffc0ULL
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+#define VTD_INV_DESC_CC_RSVD 0xfffc00000000f1c0ULL
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/* Masks for IOTLB Invalidate Descriptor */
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#define VTD_INV_DESC_IOTLB_G (3ULL << 4)
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@@ -377,7 +378,7 @@ typedef union VTDInvDesc VTDInvDesc;
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#define VTD_INV_DESC_IOTLB_DID(val) (((val) >> 16) & VTD_DOMAIN_ID_MASK)
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#define VTD_INV_DESC_IOTLB_ADDR(val) ((val) & ~0xfffULL)
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#define VTD_INV_DESC_IOTLB_AM(val) ((val) & 0x3fULL)
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-#define VTD_INV_DESC_IOTLB_RSVD_LO 0xffffffff0000ff00ULL
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+#define VTD_INV_DESC_IOTLB_RSVD_LO 0xffffffff0000f100ULL
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#define VTD_INV_DESC_IOTLB_RSVD_HI 0xf80ULL
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/* Mask for Device IOTLB Invalidate Descriptor */
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@@ -385,7 +386,7 @@ typedef union VTDInvDesc VTDInvDesc;
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#define VTD_INV_DESC_DEVICE_IOTLB_SIZE(val) ((val) & 0x1)
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#define VTD_INV_DESC_DEVICE_IOTLB_SID(val) (((val) >> 32) & 0xFFFFULL)
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#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL
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-#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8
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+#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0f1f0
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/* Rsvd field masks for spte */
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#define VTD_SPTE_SNP 0x800ULL
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--
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2.41.0.windows.1
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