50 lines
1.9 KiB
Diff
50 lines
1.9 KiB
Diff
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From 364efd620bb9b6003a2b65fe7ea56b640a209be4 Mon Sep 17 00:00:00 2001
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From: Liu Jing <liujing_yewu@cmss.chinamobile.com>
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Date: Mon, 21 Oct 2024 19:22:03 +0800
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Subject: [PATCH] target/m68k: Perform writback before modifying SR
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Writes to SR may change security state, which may involve
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a swap of %ssp with %usp as reflected in %a7. Finish the
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writeback of %sp@+ before swapping stack pointers.
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Laurent Vivier <laurent@vivier.eu>
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Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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Message-Id: <20220913142818.7802-3-richard.henderson@linaro.org>
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Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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Signed-off-by: Liu Jing <liujing_yewu@cmss.chinamobile.com>
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---
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target/m68k/translate.c | 8 +++++---
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1 file changed, 5 insertions(+), 3 deletions(-)
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diff --git a/target/m68k/translate.c b/target/m68k/translate.c
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index af43c8eab8..6cc4321921 100644
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--- a/target/m68k/translate.c
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+++ b/target/m68k/translate.c
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@@ -2269,9 +2269,9 @@ static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only)
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tcg_gen_movi_i32(QREG_CC_N, val & CCF_N ? -1 : 0);
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tcg_gen_movi_i32(QREG_CC_X, val & CCF_X ? 1 : 0);
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} else {
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- TCGv sr = tcg_const_i32(val);
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- gen_helper_set_sr(cpu_env, sr);
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- tcg_temp_free(sr);
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+ /* Must writeback before changing security state. */
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+ do_writebacks(s);
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+ gen_helper_set_sr(cpu_env, tcg_constant_i32(val));
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}
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set_cc_op(s, CC_OP_FLAGS);
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}
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@@ -2281,6 +2281,8 @@ static void gen_set_sr(DisasContext *s, TCGv val, int ccr_only)
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if (ccr_only) {
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gen_helper_set_ccr(cpu_env, val);
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} else {
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+ /* Must writeback before changing security state. */
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+ do_writebacks(s);
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gen_helper_set_sr(cpu_env, val);
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}
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set_cc_op(s, CC_OP_FLAGS);
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--
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2.41.0.windows.1
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