42 lines
1.9 KiB
Diff
42 lines
1.9 KiB
Diff
|
From 8a7cee2fcf1520efea6103ab67e34b5fdc4a44fa Mon Sep 17 00:00:00 2001
|
||
|
|
From: Liu Jing <liujing_yewu@cmss.chinamobile.com>
|
||
|
|
Date: Mon, 14 Oct 2024 16:01:16 +0800
|
||
|
|
Subject: [PATCH] target/ppc: Zero second doubleword for VSX madd instructions
|
||
|
|
MIME-Version: 1.0
|
||
|
|
Content-Type: text/plain; charset=UTF-8
|
||
|
|
Content-Transfer-Encoding: 8bit
|
||
|
|
|
||
|
|
In 205eb5a89e we updated most VSX instructions to zero the
|
||
|
|
second doubleword, as is requested by PowerISA since v3.1.
|
||
|
|
However, VSX_MADD helper was left behind unchanged, while it
|
||
|
|
is also affected and should be fixed as well.
|
||
|
|
|
||
|
|
This patch applies the fix for MADD instructions.
|
||
|
|
|
||
|
|
Fixes: 205eb5a89e ("target/ppc: Change VSX instructions behavior to fill with zeros")
|
||
|
|
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
|
||
|
|
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
|
||
|
|
Message-Id: <20220906125523.38765-6-victor.colombo@eldorado.org.br>
|
||
|
|
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
|
||
|
|
Signed-off-by: Liu Jing <liujing_yewu@cmss.chinamobile.com>
|
||
|
|
---
|
||
|
|
target/ppc/fpu_helper.c | 2 +-
|
||
|
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
||
|
|
|
||
|
|
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
|
||
|
|
index c4896cecc8..4e34cc2a3f 100644
|
||
|
|
--- a/target/ppc/fpu_helper.c
|
||
|
|
+++ b/target/ppc/fpu_helper.c
|
||
|
|
@@ -2086,7 +2086,7 @@ VSX_TSQRT(xvtsqrtsp, 4, float32, VsrW(i), -126, 23)
|
||
|
|
void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, \
|
||
|
|
ppc_vsr_t *xa, ppc_vsr_t *b, ppc_vsr_t *c) \
|
||
|
|
{ \
|
||
|
|
- ppc_vsr_t t = *xt; \
|
||
|
|
+ ppc_vsr_t t = { }; \
|
||
|
|
int i; \
|
||
|
|
\
|
||
|
|
helper_reset_fpstatus(env); \
|
||
|
|
--
|
||
|
|
2.41.0.windows.1
|
||
|
|
|