119 lines
3.7 KiB
Diff
119 lines
3.7 KiB
Diff
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From 9f45d0ded0694739898e2fbbb6fa08891a7de280 Mon Sep 17 00:00:00 2001
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From: dinglimin <dinglimin@cmss.chinamobile.com>
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Date: Mon, 10 Jun 2024 15:52:59 +0800
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Subject: [PATCH] target/ppc: Split off common embedded TLB init cheery-pick
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from 581eea5d656b73c6532109f4ced4c73fd4e5fd47`
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Several 4xx CPUs and e200 share the same TLB settings enclosed in an
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ifdef. Split it off in a common function to reduce code duplication
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and the number of ifdefs.
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Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
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Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
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Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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Signed-off-by: dinglimin <dinglimin@cmss.chinamobile.com>
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---
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target/ppc/cpu_init.c | 50 +++++++++++++------------------------------
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1 file changed, 15 insertions(+), 35 deletions(-)
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diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
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index 986d16a24d..d0dfa1aeaf 100644
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--- a/target/ppc/cpu_init.c
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+++ b/target/ppc/cpu_init.c
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@@ -3018,7 +3018,15 @@ POWERPC_FAMILY(403GCX)(ObjectClass *oc, void *data)
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pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_PX |
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POWERPC_FLAG_BUS_CLK;
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}
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-
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+static void init_tlbs_emb(CPUPPCState *env)
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+{
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+#if !defined(CONFIG_USER_ONLY)
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+ env->nb_tlb = 64;
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+ env->nb_ways = 1;
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+ env->id_tlbs = 0;
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+ env->tlb_type = TLB_EMB;
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+#endif
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+}
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static void init_proc_405(CPUPPCState *env)
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{
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/* Time base */
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@@ -3036,13 +3044,7 @@ static void init_proc_405(CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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- /* Memory management */
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-#if !defined(CONFIG_USER_ONLY)
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- env->nb_tlb = 64;
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- env->nb_ways = 1;
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- env->id_tlbs = 0;
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- env->tlb_type = TLB_EMB;
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-#endif
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+ init_tlbs_emb(env);
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init_excp_4xx_softmmu(env);
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env->dcache_line_size = 32;
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env->icache_line_size = 32;
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@@ -3135,13 +3137,7 @@ static void init_proc_440EP(CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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- /* Memory management */
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-#if !defined(CONFIG_USER_ONLY)
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- env->nb_tlb = 64;
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- env->nb_ways = 1;
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- env->id_tlbs = 0;
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- env->tlb_type = TLB_EMB;
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-#endif
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+ init_tlbs_emb(env);
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init_excp_BookE(env);
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env->dcache_line_size = 32;
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env->icache_line_size = 32;
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@@ -3259,13 +3255,7 @@ static void init_proc_440GP(CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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- /* Memory management */
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-#if !defined(CONFIG_USER_ONLY)
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- env->nb_tlb = 64;
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- env->nb_ways = 1;
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- env->id_tlbs = 0;
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- env->tlb_type = TLB_EMB;
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-#endif
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+ init_tlbs_emb(env);
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init_excp_BookE(env);
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env->dcache_line_size = 32;
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env->icache_line_size = 32;
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@@ -3443,13 +3433,7 @@ static void init_proc_440x5(CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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- /* Memory management */
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-#if !defined(CONFIG_USER_ONLY)
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- env->nb_tlb = 64;
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- env->nb_ways = 1;
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- env->id_tlbs = 0;
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- env->tlb_type = TLB_EMB;
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-#endif
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+ init_tlbs_emb(env);
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init_excp_BookE(env);
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env->dcache_line_size = 32;
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env->icache_line_size = 32;
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@@ -3877,12 +3861,8 @@ static void init_proc_e200(CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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-#if !defined(CONFIG_USER_ONLY)
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- env->nb_tlb = 64;
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- env->nb_ways = 1;
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- env->id_tlbs = 0;
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- env->tlb_type = TLB_EMB;
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-#endif
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+
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+ init_tlbs_emb(env);
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init_excp_e200(env, 0xFFFF0000UL);
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env->dcache_line_size = 32;
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env->icache_line_size = 32;
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--
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2.41.0.windows.1
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