ae37a72f4c
- pci-host: designware: Limit value range of iATU viewport register - hmat acpi: Fix out of bounds access due to missing use of indirection - migration: Skip only empty block devices - aspeed/hace: Initialize g_autofree pointer - hw/net/vmxnet3: Fix guest-triggerable assert() - qxl: don't assert() if device isn't yet initialized - Avoid unaligned fetch in ladr_match() - linux-user: Fix waitid return of siginfo_t and rusage - hw/net/lan9118: Replace magic '2048' value by MIL_TXFIFO_SIZE definition - stdvga: fix screen blanking - virtio-net: drop too short packets early - ebpf: replace deprecated bpf_program__set_socket_filter - vhsot-user: only read reply of SET_LOG_BASE from vq 0 - cpu: add Tengyun S5000C cpu support - hw/virtio: Fix obtain the buffer id from the last descriptor - hw/core: ensure kernel_end never gets used undefined Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com> (cherry picked from commit 1f9e476e96edb07e34e0133a312f478ddab4b6ff)
76 lines
2.5 KiB
Diff
76 lines
2.5 KiB
Diff
From c85a85a2c5eb5f26f9c713c010e2ca3408cb8ce4 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
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Date: Mon, 8 Apr 2024 12:44:22 +0200
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Subject: [PATCH] hw/net/lan9118: Replace magic '2048' value by MIL_TXFIFO_SIZE
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definition
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The magic 2048 is explained in the LAN9211 datasheet (DS00002414A)
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in chapter 1.4, "10/100 Ethernet MAC":
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The MAC Interface Layer (MIL), within the MAC, contains a
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2K Byte transmit and a 128 Byte receive FIFO which is separate
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from the TX and RX FIFOs. [...]
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Note, the use of the constant in lan9118_receive() reveals that
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our implementation is using the same buffer for both tx and rx.
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Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Message-Id: <20240409133801.23503-2-philmd@linaro.org>
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(cherry picked from commit a45223467e4e185fff1c76a6483784fa379ded77)
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Signed-off-by: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
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---
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hw/net/lan9118.c | 12 +++++++++---
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1 file changed, 9 insertions(+), 3 deletions(-)
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diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
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index 942bce9ae6..fa43758105 100644
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--- a/hw/net/lan9118.c
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+++ b/hw/net/lan9118.c
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@@ -155,6 +155,12 @@ do { fprintf(stderr, "lan9118: error: " fmt , ## __VA_ARGS__);} while (0)
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#define GPT_TIMER_EN 0x20000000
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+/*
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+ * The MAC Interface Layer (MIL), within the MAC, contains a 2K Byte transmit
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+ * and a 128 Byte receive FIFO which is separate from the TX and RX FIFOs.
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+ */
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+#define MIL_TXFIFO_SIZE 2048
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+
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enum tx_state {
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TX_IDLE,
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TX_B,
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@@ -171,7 +177,7 @@ typedef struct {
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int32_t pad;
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int32_t fifo_used;
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int32_t len;
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- uint8_t data[2048];
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+ uint8_t data[MIL_TXFIFO_SIZE];
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} LAN9118Packet;
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static const VMStateDescription vmstate_lan9118_packet = {
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@@ -187,7 +193,7 @@ static const VMStateDescription vmstate_lan9118_packet = {
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VMSTATE_INT32(pad, LAN9118Packet),
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VMSTATE_INT32(fifo_used, LAN9118Packet),
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VMSTATE_INT32(len, LAN9118Packet),
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- VMSTATE_UINT8_ARRAY(data, LAN9118Packet, 2048),
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+ VMSTATE_UINT8_ARRAY(data, LAN9118Packet, MIL_TXFIFO_SIZE),
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VMSTATE_END_OF_LIST()
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}
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};
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@@ -549,7 +555,7 @@ static ssize_t lan9118_receive(NetClientState *nc, const uint8_t *buf,
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return -1;
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}
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- if (size >= 2048 || size < 14) {
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+ if (size >= MIL_TXFIFO_SIZE || size < 14) {
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return -1;
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}
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--
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2.41.0.windows.1
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