401984bbd1
- target/i386: Add EPYC-Genoa model to support Zen 4 processor series - target/i386: Add VNMI and automatic IBRS feature bits - target/i386: Add missing feature bits in EPYC-Milan model - target/i386: Add feature bits for CPUID_Fn80000021_EAX - target/i386: Add a couple of feature bits in 8000_0008_EBX - target/i386: Add new EPYC CPU versions with updated cache_info - target/i386: allow versioned CPUs to specify new cache_info Signed-off-by: AlexChen <alex.chen@huawei.com> (cherry picked from commit 941be8259b4a01d66f0c9c9d16c7acf8933688eb)
86 lines
3.5 KiB
Diff
86 lines
3.5 KiB
Diff
From ee4a95c635cf3add270ed195cbf3de2af087fd69 Mon Sep 17 00:00:00 2001
|
|
From: Babu Moger <babu.moger@amd.com>
|
|
Date: Thu, 4 May 2023 15:53:08 -0500
|
|
Subject: [PATCH] target/i386: Add a couple of feature bits in 8000_0008_EBX
|
|
|
|
mainline inclusion
|
|
from mainline-8.1.0
|
|
commit bb039a230e6a7920d71d21fa9afee2653a678c48
|
|
category: feature
|
|
bugzilla: https://gitee.com/openeuler/qemu/issues/IAUSKJ
|
|
Reference: https://gitlab.com/qemu-project/qemu/-/commit/bb039a230e6a7920d71d21fa9afee2653a678c48
|
|
|
|
commit bb039a230e6a7920d71d21fa9afee2653a678c48 upstream
|
|
|
|
Add the following feature bits.
|
|
|
|
amd-psfd : Predictive Store Forwarding Disable:
|
|
PSF is a hardware-based micro-architectural optimization
|
|
designed to improve the performance of code execution by
|
|
predicting address dependencies between loads and stores.
|
|
While SSBD (Speculative Store Bypass Disable) disables both
|
|
PSF and speculative store bypass, PSFD only disables PSF.
|
|
PSFD may be desirable for the software which is concerned
|
|
with the speculative behavior of PSF but desires a smaller
|
|
performance impact than setting SSBD.
|
|
Depends on the following kernel commit:
|
|
b73a54321ad8 ("KVM: x86: Expose Predictive Store Forwarding Disable")
|
|
|
|
stibp-always-on :
|
|
Single Thread Indirect Branch Prediction mode has enhanced
|
|
performance and may be left always on.
|
|
|
|
The documentation for the features are available in the links below.
|
|
a. Processor Programming Reference (PPR) for AMD Family 19h Model 01h,
|
|
Revision B1 Processors
|
|
b. SECURITY ANALYSIS OF AMD PREDICTIVE STORE FORWARDING
|
|
|
|
Signed-off-by: Babu Moger <babu.moger@amd.com>
|
|
Acked-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Link: https://www.amd.com/system/files/documents/security-analysis-predictive-store-forwarding.pdf
|
|
Link: https://www.amd.com/system/files/TechDocs/55898_B1_pub_0.50.zip
|
|
Message-Id: <20230504205313.225073-4-babu.moger@amd.com>
|
|
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
---
|
|
target/i386/cpu.c | 4 ++--
|
|
target/i386/cpu.h | 4 ++++
|
|
2 files changed, 6 insertions(+), 2 deletions(-)
|
|
|
|
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
|
|
index 940aec42cf..02d19c2b4e 100644
|
|
--- a/target/i386/cpu.c
|
|
+++ b/target/i386/cpu.c
|
|
@@ -949,10 +949,10 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
NULL, NULL, NULL, NULL,
|
|
NULL, "wbnoinvd", NULL, NULL,
|
|
"ibpb", NULL, "ibrs", "amd-stibp",
|
|
- NULL, NULL, NULL, NULL,
|
|
+ NULL, "stibp-always-on", NULL, NULL,
|
|
NULL, NULL, NULL, NULL,
|
|
"amd-ssbd", "virt-ssbd", "amd-no-ssb", NULL,
|
|
- NULL, NULL, NULL, NULL,
|
|
+ "amd-psfd", NULL, NULL, NULL,
|
|
},
|
|
.cpuid = { .eax = 0x80000008, .reg = R_EBX, },
|
|
.tcg_features = 0,
|
|
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
|
|
index e8322a928b..623bd0e4d6 100644
|
|
--- a/target/i386/cpu.h
|
|
+++ b/target/i386/cpu.h
|
|
@@ -934,8 +934,12 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
|
|
#define CPUID_8000_0008_EBX_IBRS (1U << 14)
|
|
/* Single Thread Indirect Branch Predictors */
|
|
#define CPUID_8000_0008_EBX_STIBP (1U << 15)
|
|
+/* STIBP mode has enhanced performance and may be left always on */
|
|
+#define CPUID_8000_0008_EBX_STIBP_ALWAYS_ON (1U << 17)
|
|
/* Speculative Store Bypass Disable */
|
|
#define CPUID_8000_0008_EBX_AMD_SSBD (1U << 24)
|
|
+/* Predictive Store Forwarding Disable */
|
|
+#define CPUID_8000_0008_EBX_AMD_PSFD (1U << 28)
|
|
|
|
#define CPUID_XSAVE_XSAVEOPT (1U << 0)
|
|
#define CPUID_XSAVE_XSAVEC (1U << 1)
|
|
--
|
|
2.45.1.windows.1
|
|
|