401984bbd1
- target/i386: Add EPYC-Genoa model to support Zen 4 processor series - target/i386: Add VNMI and automatic IBRS feature bits - target/i386: Add missing feature bits in EPYC-Milan model - target/i386: Add feature bits for CPUID_Fn80000021_EAX - target/i386: Add a couple of feature bits in 8000_0008_EBX - target/i386: Add new EPYC CPU versions with updated cache_info - target/i386: allow versioned CPUs to specify new cache_info Signed-off-by: AlexChen <alex.chen@huawei.com> (cherry picked from commit 941be8259b4a01d66f0c9c9d16c7acf8933688eb)
108 lines
3.9 KiB
Diff
108 lines
3.9 KiB
Diff
From e06155ba57d41604c66d849ed2032e66f35215ac Mon Sep 17 00:00:00 2001
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From: Michael Roth <michael.roth@amd.com>
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Date: Thu, 4 May 2023 15:53:06 -0500
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Subject: [PATCH] target/i386: allow versioned CPUs to specify new cache_info
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mainline inclusion
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from mainline-8.1.0
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commit cca0a000d06f897411a8af4402e5d0522bbe450b
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category: feature
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bugzilla: https://gitee.com/openeuler/qemu/issues/IAUSKJ
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Reference: https://gitlab.com/qemu-project/qemu/-/commit/cca0a000d06f897411a8af4402e5d0522bbe450b
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commit cca0a000d06f897411a8af4402e5d0522bbe450b upstream
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New EPYC CPUs versions require small changes to their cache_info's.
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Because current QEMU x86 CPU definition does not support versioned
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cach_info, we would have to declare a new CPU type for each such case.
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To avoid the dup work, add "cache_info" in X86CPUVersionDefinition",
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to allow new cache_info pointers to be specified for a new CPU version.
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Co-developed-by: Wei Huang <wei.huang2@amd.com>
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Signed-off-by: Wei Huang <wei.huang2@amd.com>
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Signed-off-by: Michael Roth <michael.roth@amd.com>
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Signed-off-by: Babu Moger <babu.moger@amd.com>
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Acked-by: Michael S. Tsirkin <mst@redhat.com>
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Message-Id: <20230504205313.225073-2-babu.moger@amd.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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---
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target/i386/cpu.c | 35 ++++++++++++++++++++++++++++++++---
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1 file changed, 32 insertions(+), 3 deletions(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 4473e0923e..60df10c954 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1624,6 +1624,7 @@ typedef struct X86CPUVersionDefinition {
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const char *alias;
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const char *note;
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PropValue *props;
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+ const CPUCaches *const cache_info;
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} X86CPUVersionDefinition;
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/* Base definition for a CPU model */
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@@ -5570,6 +5571,31 @@ static void x86_cpu_apply_version_props(X86CPU *cpu, X86CPUModel *model)
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assert(vdef->version == version);
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}
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+static const CPUCaches *x86_cpu_get_versioned_cache_info(X86CPU *cpu,
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+ X86CPUModel *model)
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+{
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+ const X86CPUVersionDefinition *vdef;
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+ X86CPUVersion version = x86_cpu_model_resolve_version(model);
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+ const CPUCaches *cache_info = model->cpudef->cache_info;
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+
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+ if (version == CPU_VERSION_LEGACY) {
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+ return cache_info;
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+ }
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+
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+ for (vdef = x86_cpu_def_get_versions(model->cpudef); vdef->version; vdef++) {
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+ if (vdef->cache_info) {
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+ cache_info = vdef->cache_info;
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+ }
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+
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+ if (vdef->version == version) {
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+ break;
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+ }
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+ }
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+
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+ assert(vdef->version == version);
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+ return cache_info;
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+}
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+
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/*
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* Load data from X86CPUDefinition into a X86CPU object.
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* Only for builtin_x86_defs models initialized with x86_register_cpudef_types.
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@@ -5602,7 +5628,7 @@ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model)
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}
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/* legacy-cache defaults to 'off' if CPU model provides cache info */
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- cpu->legacy_cache = !def->cache_info;
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+ cpu->legacy_cache = !x86_cpu_get_versioned_cache_info(cpu, model);
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env->features[FEAT_1_ECX] |= CPUID_EXT_HYPERVISOR;
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@@ -7046,14 +7072,17 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
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/* Cache information initialization */
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if (!cpu->legacy_cache) {
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- if (!xcc->model || !xcc->model->cpudef->cache_info) {
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+ const CPUCaches *cache_info =
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+ x86_cpu_get_versioned_cache_info(cpu, xcc->model);
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+
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+ if (!xcc->model || !cache_info) {
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g_autofree char *name = x86_cpu_class_get_model_name(xcc);
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error_setg(errp,
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"CPU model '%s' doesn't support legacy-cache=off", name);
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return;
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}
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env->cache_info_cpuid2 = env->cache_info_cpuid4 = env->cache_info_amd =
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- *xcc->model->cpudef->cache_info;
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+ *cache_info;
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} else {
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/* Build legacy cache information */
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env->cache_info_cpuid2.l1d_cache = &legacy_l1d_cache;
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--
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2.45.1.windows.1
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