11aadaf893
- python/aqmp: use absolute import statement - sysemu: Cleanup qemu_run_machine_init_done_notifiers() - vhost-backend: avoid overflow on memslots_limit - hw/i386/vmmouse: Require 'i8042' property to be set - hw/scsi/megasas: Fails command if SGL buffer overflows - target/i386/kvm: Replace use of __u32 type - hw/avr: Realize AVRCPU qdev object using qdev_realize() - qemu-keymap: Add license in generated files - configure: Symlink binaries using .exe suffix with MinGW - ui: remove break after g_assert_not_reached() - io/channel-websock: Replace strlen(const_str) by sizeof(const_str) - 1 - target/ppc: Add HASHKEYR and HASHPKEYR SPRs - tests: Fix error strings - Hexagon (target/hexagon) remove unused encodings - target/i386: introduce insn_get_addr - target/i386: REPZ and REPNZ are mutually exclusive - target/i386: correctly mask SSE4a bit indices in register operands - bios-tables-test: Make oem-fields tests be consistent - tests/vm: update NetBSD to 9.3 - monitor/hmp-cmds: Avoid displaying bogus size in 'info pci' When BAR aren't mapped, we get: - virtio-mem: don't warn about THP sizes on a kernel without THP Support - Subject: [PATCH] kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com> (cherry picked from commit 2430c96ac522f910c11eb98c2d9f74c2c3336a00)
90 lines
3.4 KiB
Diff
90 lines
3.4 KiB
Diff
From c7a2780e7e3ff001d3651c20767011d1f5bfbfd5 Mon Sep 17 00:00:00 2001
|
|
From: liujing <liujing_yewu@cmss.chinamobile.com>
|
|
Date: Thu, 19 Sep 2024 10:14:22 +0800
|
|
Subject: [PATCH] target/ppc: Add HASHKEYR and HASHPKEYR SPRs
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
Add the Special Purpose Registers HASHKEYR and HASHPKEYR, which were
|
|
introduced by the Power ISA 3.1B. They are used by the new instructions
|
|
hashchk(p) and hashst(p).
|
|
|
|
The ISA states that the Operating System should generate the value for
|
|
these registers when creating a process, so it's its responsability to
|
|
do so. We initialize it with 0 for qemu-softmmu, and set a random 64
|
|
bits value for linux-user.
|
|
|
|
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
|
|
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
|
|
Message-Id: <20220715205439.161110-2-victor.colombo@eldorado.org.br>
|
|
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
|
|
Signed-off-by: Liu Jing <liujing_yewu@cmss.chinamobile.com>
|
|
---
|
|
target/ppc/cpu.h | 2 ++
|
|
target/ppc/cpu_init.c | 28 ++++++++++++++++++++++++++++
|
|
2 files changed, 30 insertions(+)
|
|
|
|
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
|
|
index 8b214b2cc1..1281323c02 100644
|
|
--- a/target/ppc/cpu.h
|
|
+++ b/target/ppc/cpu.h
|
|
@@ -1623,6 +1623,8 @@ typedef PowerPCCPU ArchCPU;
|
|
#define SPR_BOOKE_GIVOR14 (0x1BD)
|
|
#define SPR_TIR (0x1BE)
|
|
#define SPR_PTCR (0x1D0)
|
|
+#define SPR_HASHKEYR (0x1D4)
|
|
+#define SPR_HASHPKEYR (0x1D5)
|
|
#define SPR_BOOKE_SPEFSCR (0x200)
|
|
#define SPR_Exxx_BBEAR (0x201)
|
|
#define SPR_Exxx_BBTAR (0x202)
|
|
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
|
|
index a220d0dc51..211759508f 100644
|
|
--- a/target/ppc/cpu_init.c
|
|
+++ b/target/ppc/cpu_init.c
|
|
@@ -2098,6 +2098,33 @@ static void register_8xx_sprs(CPUPPCState *env)
|
|
0x00000000);
|
|
}
|
|
|
|
+static void register_power10_hash_sprs(CPUPPCState *env)
|
|
+{
|
|
+ /*
|
|
+ * it's the OS responsability to generate a random value for the registers
|
|
+ * in each process' context. So, initialize it with 0 here.
|
|
+ */
|
|
+ uint64_t hashkeyr_initial_value = 0, hashpkeyr_initial_value = 0;
|
|
+#if defined(CONFIG_USER_ONLY)
|
|
+ /* in linux-user, setup the hash register with a random value */
|
|
+ GRand *rand = g_rand_new();
|
|
+ hashkeyr_initial_value =
|
|
+ ((uint64_t)g_rand_int(rand) << 32) | (uint64_t)g_rand_int(rand);
|
|
+ hashpkeyr_initial_value =
|
|
+ ((uint64_t)g_rand_int(rand) << 32) | (uint64_t)g_rand_int(rand);
|
|
+ g_rand_free(rand);
|
|
+#endif
|
|
+ spr_register(env, SPR_HASHKEYR, "HASHKEYR",
|
|
+ SPR_NOACCESS, SPR_NOACCESS,
|
|
+ &spr_read_generic, &spr_write_generic,
|
|
+ hashkeyr_initial_value);
|
|
+ spr_register_hv(env, SPR_HASHPKEYR, "HASHPKEYR",
|
|
+ SPR_NOACCESS, SPR_NOACCESS,
|
|
+ SPR_NOACCESS, SPR_NOACCESS,
|
|
+ &spr_read_generic, &spr_write_generic,
|
|
+ hashpkeyr_initial_value);
|
|
+}
|
|
+
|
|
/*
|
|
* AMR => SPR 29 (Power 2.04)
|
|
* CTRL => SPR 136 (Power 2.04)
|
|
@@ -8107,6 +8134,7 @@ static void init_proc_POWER10(CPUPPCState *env)
|
|
register_power8_book4_sprs(env);
|
|
register_power8_rpr_sprs(env);
|
|
register_power9_mmu_sprs(env);
|
|
+ register_power10_hash_sprs(env);
|
|
|
|
/* FIXME: Filter fields properly based on privilege level */
|
|
spr_register_kvm_hv(env, SPR_PSSCR, "PSSCR", NULL, NULL, NULL, NULL,
|
|
--
|
|
2.41.0.windows.1
|
|
|