!161 revert "rasdaemon: Add HBM Memory ACLS support for HiSilicon"
From: @hejunhao3 Reviewed-by: @hunan4222, @dillon_chen Signed-off-by: @dillon_chen
This commit is contained in:
commit
df360dca76
274
0001-revert-rasdaemon-Add-HBM-Memory-ACLS-support-for-HiS.patch
Normal file
274
0001-revert-rasdaemon-Add-HBM-Memory-ACLS-support-for-HiS.patch
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@ -0,0 +1,274 @@
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From 77c2ccb26b5da0c24a82ae956164fe527723dabd Mon Sep 17 00:00:00 2001
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From: Junhao He <hejunhao3@huawei.com>
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Date: Mon, 2 Sep 2024 10:24:59 +0800
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Subject: [PATCH] revert "rasdaemon: Add HBM Memory ACLS support for HiSilicon"
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The HBM ACLS scheme that rasdaemon relies on has changed. Moreover, the
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new solution only needs to be uploaded to the openEuler-22.03-LTS-SP4
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branch, so this branch cancels support for HiSilicon HBM Memory ACLS.
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Signed-off-by: Junhao He <hejunhao3@huawei.com>
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---
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configure.ac | 11 ----
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misc/rasdaemon.env | 5 --
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non-standard-hisilicon.c | 110 -------------------------------------
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ras-events.c | 3 -
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ras-non-standard-handler.c | 32 -----------
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ras-non-standard-handler.h | 8 ---
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6 files changed, 169 deletions(-)
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diff --git a/configure.ac b/configure.ac
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index 30c90d2..d098fcf 100644
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--- a/configure.ac
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+++ b/configure.ac
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@@ -171,16 +171,6 @@ AS_IF([test "x$enable_cpu_fault_isolation" = "xyes" || test "x$enable_all" == "x
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AM_CONDITIONAL([WITH_CPU_FAULT_ISOLATION], [test x$enable_cpu_fault_isolation = xyes || test x$enable_all == xyes])
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AM_COND_IF([WITH_CPU_FAULT_ISOLATION], [USE_CPU_FAULT_ISOLATION="yes"], [USE_CPU_FAULT_ISOLATION="no"])
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-AC_ARG_ENABLE([hisi_hbm_memory_acls],
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- AS_HELP_STRING([--enable-hisi-hbm-memory-acls], [enable HiSilicon HBM Memory ACLS]))
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-
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-AS_IF([test "x$enable_hisi_hbm_memory_acls" = "xyes" || test "x$enable_all" == "xyes"], [
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- AC_DEFINE(HAVE_HISI_HBM_MEMORY_ACLS,1,"have HiSilicon HBM Memory ACLS")
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- AC_SUBST([WITH_HISI_HBM_MEMORY_ACLS])
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-])
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-AM_CONDITIONAL([WITH_HISI_HBM_MEMORY_ACLS], [test x$enable_hisi_hbm_memory_acls = xyes || test x$enable_all == xyes])
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-AM_COND_IF([WITH_HISI_HBM_MEMORY_ACLS], [USE_HISI_HBM_MEMORY_ACLS="yes"], [USE_HISI_HBM_MEMORY_ACLS="no"])
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-
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test "$sysconfdir" = '${prefix}/etc' && sysconfdir=/etc
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CFLAGS="$CFLAGS -Wall -Wmissing-prototypes -Wstrict-prototypes"
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@@ -222,5 +212,4 @@ compile time options summary
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Memory CE PFA : $USE_MEMORY_CE_PFA
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AMP RAS errors : $USE_AMP_NS_DECODE
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CPU fault isolation : $USE_CPU_FAULT_ISOLATION
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- HISI HBM Memory ACLS: $USE_HISI_HBM_MEMORY_ACLS
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EOF
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diff --git a/misc/rasdaemon.env b/misc/rasdaemon.env
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index d754128..ca12a1a 100644
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--- a/misc/rasdaemon.env
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+++ b/misc/rasdaemon.env
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@@ -45,10 +45,5 @@ CPU_ISOLATION_CYCLE="24h"
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# Prevent excessive isolation from causing an avalanche effect
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CPU_ISOLATION_LIMIT="10"
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-# Support the HBM Memory ACLS (Adaptive Cache Line Sparing) on HiSilicon platform (yes|no).
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-HISI_HBM_MEMORY_ACLS="no"
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-# Specify rasdaemon to isolation the error page which fails to be repaired by HiSilicon HBM ACLS (yes|no).
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-HISI_HBM_ISOLATION_PAGE="no"
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-
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# Disable specified events by config
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DISABLE="block:block_rq_complete"
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\ No newline at end of file
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diff --git a/non-standard-hisilicon.c b/non-standard-hisilicon.c
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index 25c4903..7296d28 100644
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--- a/non-standard-hisilicon.c
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+++ b/non-standard-hisilicon.c
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@@ -19,17 +19,6 @@
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#define HISI_BUF_LEN 2048
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#define HISI_PCIE_INFO_BUF_LEN 256
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-#ifdef HAVE_HISI_HBM_MEMORY_ACLS
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-# define HISI_TYPE_UINT32_WIDTH 32
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-/* Specify the Hisilicon HBMC HBM error type */
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-# define HISI_HBM_ERR_TYPE 0
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-# define HISI_HBM_ERR_ACLS BIT(0)
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-# define HISI_HBM_ACLS_ADDL 1
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-# define HISI_HBM_ACLS_ADDH 2
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-# define HISI_HBM_ACLS_ARRAY_SIZE 12
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-# define HISI_SUBMOD_HBMC_HBM 6
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-#endif
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-
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struct hisi_common_error_section {
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uint32_t val_bits;
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uint8_t version;
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@@ -369,100 +358,6 @@ static int add_hisi_common_table(struct ras_events *ras,
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return 0;
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}
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-#ifdef HAVE_HISI_HBM_MEMORY_ACLS
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-#include <errno.h>
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-#include <unistd.h>
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-
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-static int write_file(const char *name, unsigned long long value)
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-{
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- char fname[MAX_PATH + 1] = "/sys/kernel/";
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- FILE *file;
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- int ret;
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-
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- strcat(fname, name);
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- if (access(fname, W_OK)) {
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- log(TERM, LOG_WARNING, "HiSilicon HBM ACLS: Cannot access '%s': %s\n",
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- fname, strerror(errno));
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- return -errno;
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- }
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-
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- file = fopen(fname, "w");
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- if (!file) {
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- log(TERM, LOG_WARNING, "HiSilicon HBM ACLS: Cannot to open '%s': %s\n",
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- fname, strerror(errno));
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- return -errno;
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- }
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-
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- ret = fprintf(file, "0x%llx\n", value);
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- if (ret < 0)
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- log(TERM, LOG_WARNING, "HiSilicon HBM ACLS: Failed to set %s (0x%llx): %s\n",
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- fname, value, strerror(errno));
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-
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- fclose(file);
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- return ret;
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-}
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-
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-static int hisi_hbmc_hbm_acls(const struct hisi_common_error_section *err,
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- int page_size)
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-{
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- unsigned long long paddr;
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- unsigned long long pfn;
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- int ret;
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-
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- if (err->reg_array_size < HISI_HBM_ACLS_ARRAY_SIZE) {
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- log(TERM, LOG_WARNING, "HiSilicon HBM ACLS: No valid address array length (%d)\n",
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- err->reg_array_size);
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- return -1;
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- }
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-
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- if (!page_size)
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- return -1;
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-
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- paddr = err->reg_array[HISI_HBM_ACLS_ADDH];
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- paddr <<= HISI_TYPE_UINT32_WIDTH;
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- paddr += err->reg_array[HISI_HBM_ACLS_ADDL];
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- pfn = paddr / page_size;
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-
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- ret = write_file("hbm_memory/acls/acls_query", paddr);
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- if (ret < 0)
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- return ret;
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-
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- ret = write_file("debug/hwpoison/corrupt-pfn", pfn);
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- if (ret < 0)
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- return ret;
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-
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- ret = write_file("hbm_memory/acls/acls_repair", paddr);
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- if (ret < 0 && ras_ns_hisi_hbm_isolation_page_enabled()) {
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- log(TERM, LOG_WARNING, "HiSilicon HBM ACLS: Keep the pfn (0x%llx) offline\n",
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- pfn);
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- return ret;
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- }
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-
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- ret = write_file("debug/hwpoison/unpoison-pfn", pfn);
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- if (ret < 0)
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- return ret;
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-
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- return 0;
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-}
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-
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-static void hisi_hbm_acls_handler(const struct hisi_common_error_section *err,
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- int page_size)
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-{
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- if (strcmp(module_name[err->module_id], "HBMC") ||
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- err->submodule_id != HISI_SUBMOD_HBMC_HBM)
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- return;
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-
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- if (!(err->val_bits & BIT(HISI_COMMON_VALID_REG_ARRAY_SIZE)))
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- return;
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-
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- if (!(err->reg_array[HISI_HBM_ERR_TYPE] & HISI_HBM_ERR_ACLS))
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- return;
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-
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- if (hisi_hbmc_hbm_acls(err, page_size))
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- log(TERM, LOG_WARNING, "Failed to handler HiSilicon HBM ACLS\n");
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-}
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-#endif
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-
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static int decode_hisi_common_section(struct ras_events *ras,
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struct ras_ns_ev_decoder *ev_decoder,
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struct trace_seq *s,
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@@ -498,11 +393,6 @@ static int decode_hisi_common_section(struct ras_events *ras,
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step_vendor_data_tab(ev_decoder, "hisi_common_section_tab");
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}
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-#ifdef HAVE_HISI_HBM_MEMORY_ACLS
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- if (ras_ns_hisi_hbm_acls_enabled())
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- hisi_hbm_acls_handler(err, ras->page_size);
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-#endif
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-
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return 0;
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}
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diff --git a/ras-events.c b/ras-events.c
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index d2a7a4e..ed2198b 100644
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--- a/ras-events.c
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+++ b/ras-events.c
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@@ -951,9 +951,6 @@ int handle_ras_events(int record_events)
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#endif
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#ifdef HAVE_NON_STANDARD
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-#ifdef HAVE_HISI_HBM_MEMORY_ACLS
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- ras_ns_hisi_hbm_param_init();
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-#endif
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if (is_disabled_event("ras", "non_standard_event")) {
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log(ALL, LOG_INFO, "Disabled %s:%s tracing from config\n",
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"ras", "non_standard_event");
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diff --git a/ras-non-standard-handler.c b/ras-non-standard-handler.c
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index 3ed0900..20d514b 100644
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--- a/ras-non-standard-handler.c
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+++ b/ras-non-standard-handler.c
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@@ -24,38 +24,6 @@
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static struct ras_ns_ev_decoder *ras_ns_ev_dec_list;
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-#ifdef HAVE_HISI_HBM_MEMORY_ACLS
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-static bool ras_ns_hisi_hbm_acls;
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-static bool ras_ns_hisi_hbm_isolation_page;
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-
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-void ras_ns_hisi_hbm_param_init(void)
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-{
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- char *env;
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-
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- env = getenv("HISI_HBM_MEMORY_ACLS");
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- if (env && strcasecmp(env, "yes") == 0) {
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- log(TERM, LOG_INFO, "HiSilicon HBM Memory ACLS is enabled\n");
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- ras_ns_hisi_hbm_acls = true;
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- }
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-
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- env = getenv("HISI_HBM_ISOLATION_PAGE");
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- if (env && strcasecmp(env, "yes") == 0) {
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- log(TERM, LOG_INFO, "HiSilicon HBM ACLS page isolation is enabled\n");
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- ras_ns_hisi_hbm_isolation_page = true;
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- }
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-}
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-
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-bool ras_ns_hisi_hbm_acls_enabled(void)
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-{
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- return ras_ns_hisi_hbm_acls;
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-}
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-
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-bool ras_ns_hisi_hbm_isolation_page_enabled(void)
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-{
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- return ras_ns_hisi_hbm_isolation_page;
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-}
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-#endif
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-
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void print_le_hex(struct trace_seq *s, const uint8_t *buf, int index) {
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trace_seq_printf(s, "%02x%02x%02x%02x", buf[index+3], buf[index+2], buf[index+1], buf[index]);
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}
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diff --git a/ras-non-standard-handler.h b/ras-non-standard-handler.h
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index 1c2a6e7..341206a 100644
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--- a/ras-non-standard-handler.h
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+++ b/ras-non-standard-handler.h
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@@ -46,12 +46,4 @@ void ras_ns_finalize_vendor_tables(void);
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static inline int register_ns_ev_decoder(struct ras_ns_ev_decoder *ns_ev_decoder) { return 0; };
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#endif
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-#ifdef HAVE_HISI_HBM_MEMORY_ACLS
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-#include <stdbool.h>
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-
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-void ras_ns_hisi_hbm_param_init(void);
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-bool ras_ns_hisi_hbm_acls_enabled(void);
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-bool ras_ns_hisi_hbm_isolation_page_enabled(void);
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-#endif
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-
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#endif
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--
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2.33.0
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@ -1,6 +1,6 @@
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Name: rasdaemon
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Version: 0.6.7
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Release: 20
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Release: 21
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License: GPLv2
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Summary: Utility to get Platform Reliability, Availability and Serviceability (RAS) reports via the Kernel tracing events
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URL: https://github.com/mchehab/rasdaemon.git
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@ -60,6 +60,7 @@ Patch9008: 0001-rasdaemon-Add-HBM-Memory-ACLS-support-for-HiSilicon.patch
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Patch9009: add-dynamic-switch-of-ras-events-support-and-disable-block-rq-complete.patch
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Patch9010: fix-rasdaemon-print-loading-config-logs-multiple-times.patch
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Patch9011: bugfix-fix-cpu-isolate-errors-when-some-cpus-are-.patch
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Patch9012: 0001-revert-rasdaemon-Add-HBM-Memory-ACLS-support-for-HiS.patch
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%description
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@ -79,7 +80,7 @@ autoheader
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libtoolize --automake --copy --debug --force
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automake --add-missing
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%ifarch %{arm} aarch64
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%configure --enable-mce --enable-aer --enable-sqlite3 --enable-extlog --enable-abrt-report --enable-devlink --enable-diskerror --enable-non-standard --enable-hisi-ns-decode --enable-arm --enable-memory-failure --enable-memory-ce-pfa --enable-cpu-fault-isolation --enable-hisi-hbm-memory-acls
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%configure --enable-mce --enable-aer --enable-sqlite3 --enable-extlog --enable-abrt-report --enable-devlink --enable-diskerror --enable-non-standard --enable-hisi-ns-decode --enable-arm --enable-memory-failure --enable-memory-ce-pfa --enable-cpu-fault-isolation
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%else
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%configure --enable-mce --enable-aer --enable-sqlite3 --enable-extlog --enable-abrt-report --enable-devlink --enable-diskerror
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%endif
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@ -114,6 +115,12 @@ if [ $1 -eq 0 ] ; then
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fi
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%changelog
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* Mon Sep 2 2024 Junhao He <hejunhao3@huawei.com> - 0.6.7-21
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- Type:bugfix
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- ID:NA
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- SUG:NA
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- DESC:Remove the support for HiSilicon HBM Memory ACLS.
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* Thu Apr 25 2024 yangjunshuo <yangjunshuo@huawei.com> - 0.6.7-20
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- Type:bugfix
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- ID:NA
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